(Portions of the technical material contained in this section may not be prior art.)
State of the art radio frequency (RF) electrical circuits use large quantities of passive devices. Many of these circuits are used in hand held wireless products. Accordingly, miniaturization of passive devices and passive device circuits is an important goal in RF device technology.
Integration and miniaturization of passive devices on the scale of active silicon devices has not occurred for at least two reasons. One, typical passive devices to date employ different material technologies. But, more fundamentally, the size of many passive devices is a function of the frequency of the device, and thus is inherently relatively large. However, still, there is unrelenting pressure to produce more compact and area efficient IPDs.
Significant advances have been achieved. In many cases these involve surface mount technology (SMT). Small substrates containing large numbers of passive components are routinely produced using surface mount technology.
More recent advances in producing integrated passive device networks involve thin film technology where resistors capacitors and inductors are built as integrated thin film devices on a suitable substrate. See for example U.S. Pat. No. 6,388,290. This advance shows promise as the next generation of integration in passive device technology. However, just as the substrate material and character (pure single crystal silicon) have been key to the success in active device technology, it is becoming evident that the same is true as IPD integration develops. Because passive thin film devices are formed directly on the substrate, electrical interactions between the substrate and the passive devices are of major concern. U.S. patent application Ser. No. 10/835,338 addresses these issues, and describes and claims an IPD substrate that offers processing advantages coupled with the desired dielectric properties. This substrate can also be made thin, to reduce the profile of the IPD.
While a common concern from a miniaturization standpoint is the so-called “footprint” of a device or circuit, reducing thickness is a companion goal. A common approach to reducing the footprint of ICs is to stack two or more chips in an MCM. In MCM technology, the thickness of the packaged chips is often as important as the footprint.
The MCM approach to miniaturization in RF circuits is often avoided due to the problem of RF interactions between components, especially inductor elements. The usual approach for RF circuits and IPDs is to spread the devices laterally on the substrate. Typically an IPD substrate is larger than a typical semiconductor IC, so to implement an MCM containing an IPD substrate, the IPD substrate is the logical candidate for the carrier substrate of the MCM, i.e. the semiconductor chips would be mounted on top of the IPD substrate. However, stacking devices on an IPD substrate especially invites problematic interactions. An IPD substrate in this MCM configuration faces two issues of RF field interactions, one with the substrate on which the IPD substrate is mounted, and another with the IC chips on the top of the IPD substrate.